#include <system/mediators/ir/sir_8250.h>
#include <system/mediators/ir/serial_reg.h>
#include <pc/ix86.h>



__BEGIN_SYS

sir_8250::sir_8250()
{
    //dbtrc << "sir_8250()\n";
}

sir_8250::~sir_8250()
{
    //dbtrc << "~sir_8250()\n";
}

void sir_8250::initialize(Ix86_Reg16 io_base, Ix86_Reg8 irq, Ix86_Reg16 speed)
{
     //dbtrc << "sir_8250::initialize()\n";
	this->io_base = io_base;
	this->irq = irq;
	this->speed = speed;
	start();
}

void sir_8250::setSpeed(Ix86_Reg16 newSpeed)
{
     //dbtrc << "sir_8250::setSpeed()\n";

	int iobase; 
	int fcr;    /* FIFO control reg */
	int lcr;    /* Line control reg */
	int divisor;

	iobase = this->io_base;
	
	/* Update accounting for new speed */
	this->speed = newSpeed;

	/* Turn off interrupts */
	ix86_outb(0, iobase+UART_IER); 

	divisor = SPEED_MAX/speed;
	
	fcr = UART_FCR_ENABLE_FIFO;

	/* 
	 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
	 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
	 * about this timeout since it will always be fast enough. 
	 */
	if (this->speed < 38400)
		fcr |= UART_FCR_TRIGGER_1;
	else 
		fcr |= UART_FCR_TRIGGER_14;
        
	/* IrDA ports use 8N1 */
	lcr = UART_LCR_WLEN8;
	
	ix86_outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */
	ix86_outb(divisor & 0xff,      iobase+UART_DLL); /* Set speed */
	ix86_outb(divisor >> 8,	  iobase+UART_DLM);
	ix86_outb(lcr,		  iobase+UART_LCR); /* Set 8N1	*/
	ix86_outb(fcr,		  iobase+UART_FCR); /* Enable FIFO's */

	/* Turn on interrups */
	ix86_outb(/*UART_IER_RLSI|*/UART_IER_RDI/*|UART_IER_THRI*/, iobase+UART_IER);
}

void sir_8250::getByte(Ix86_Reg8 *data)
{
     //dbtrc << "sir_8250::getByte()\n";
	
	int iobase;

	iobase = this->io_base;

	if (ix86_inb(iobase+UART_LSR) & UART_LSR_DR)
		*data = ix86_inb(iobase+UART_RX);
	
}

int sir_8250::setByte(Ix86_Reg8 data)
{
     //dbtrc << "sir_8250::setByte()\n";

	int iobase;

	iobase = this->io_base;
	
	/* Tx FIFO should be empty! */
	if (!(ix86_inb(iobase+UART_LSR) & UART_LSR_THRE)) {
		//dbtrc << "sir_8250::setByte(), failed, fifo not empty!\n";
		return -1;
	}
        
	/* Transmit  byte */
	ix86_outb(data, iobase+UART_TX);
	return 0;
}

void sir_8250::start()
{
	int iobase;

	iobase = this->io_base;

	stop();
	
	/* Initialize UART */
	ix86_outb(UART_LCR_WLEN8, iobase+UART_LCR);  /* Reset DLAB */
	ix86_outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);
	
	/* Turn on interrups */
	ix86_outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, iobase+UART_IER);

     //dbtrc << "sir_8250::start()\n";
}

void sir_8250::stop()
{
	int iobase;

	iobase = this->io_base;

	/* Reset UART */
	ix86_outb(0, iobase+UART_MCR);
	
	/* Turn off interrupts */
	ix86_outb(0, iobase+UART_IER);

     //dbtrc << "sir_8250::stop()\n";
}


// void sir_8250::method(void)
// {
//     dbtrc << "sir_8250::method()\n";
// }

__END_SYS